AlgoPlus//structures / isa
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Instruction Set (ISA)

The hardware/software contract — how an instruction is encoded into bit fields.

Step
1/1
Legend
opcode
source reg
dest / target
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In a nutshell
An instruction set architecture is the agreed contract between software and the processor: which instructions exist and how each is encoded as bits. Every instruction is split into fields — an opcode that says what to do, plus operand fields naming registers or constants. RISC designs keep these few and fixed-width so they pipeline easily; CISC designs allow many variable-width instructions that pack more work into each one.
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An ISA is the contract between software and hardware: the instructions and how they encode into bit fields. Fixed-width RISC is easy to pipeline; variable-width CISC packs more per instruction.
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